Semiconductor Engineering

Implementing Fast Barriers For A Shared-Memory Cluster Of 1024 RISC-V Cores

A technical paper titled “Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster” was published by researchers at ETH Zürich and Università di Bologna. “Synchronization ...
Design-Reuse

Slide Shows Samsung May be Developing a RISC-V CPU for In-memory AI Chip

Samsung may have unintentionally revealed its intent to develop a RISC-V CPU, which a presentation slide showed may be used in an AI chip. The company plans to release an AI accelerator with heavy ...
insideHPC

d-Matrix and Andes Collaborate on RISC-V Accelerator for AI Inference

ST. LOUIS (SC25) — Nov 17, 2025 – Generative AI inference compute company d-Matrix and Andes Technology , a supplier of RISC-V processor cores, announced that d-Matrix has selected the AndesCore ...